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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR0" target="_self">TMR0 - Counter/Timer Register</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA0" target="_self">CMPRA0 - Counter/Timer A0 Compare Registers</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB0" target="_self">CMPRB0 - Counter/Timer B0 Compare Registers</a>
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                            <a class="el" href="#CTRL0" target="_self">CTRL0 - Counter/Timer Control</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA0" target="_self">CMPRAUXA0 - Counter/Timer A0 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB0" target="_self">CMPRAUXB0 - Counter/Timer B0 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX0" target="_self">AUX0 - Counter/Timer Auxiliary</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR1" target="_self">TMR1 - Counter/Timer Register</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA1" target="_self">CMPRA1 - Counter/Timer A1 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB1" target="_self">CMPRB1 - Counter/Timer B1 Compare Registers</a>
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                            <a class="el" href="#CTRL1" target="_self">CTRL1 - Counter/Timer Control</a>
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                            <a class="el" href="#CMPRAUXA1" target="_self">CMPRAUXA1 - Counter/Timer A1 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB1" target="_self">CMPRAUXB1 - Counter/Timer B1 Compare Registers</a>
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                            <a class="el" href="#AUX1" target="_self">AUX1 - Counter/Timer Auxiliary</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR2" target="_self">TMR2 - Counter/Timer Register</a>
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                            <a class="el" href="#CMPRA2" target="_self">CMPRA2 - Counter/Timer A2 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB2" target="_self">CMPRB2 - Counter/Timer B2 Compare Registers</a>
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                            <a class="el" href="#CTRL2" target="_self">CTRL2 - Counter/Timer Control</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA2" target="_self">CMPRAUXA2 - Counter/Timer A2 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB2" target="_self">CMPRAUXB2 - Counter/Timer B2 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX2" target="_self">AUX2 - Counter/Timer Auxiliary</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR3" target="_self">TMR3 - Counter/Timer Register</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA3" target="_self">CMPRA3 - Counter/Timer A3 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB3" target="_self">CMPRB3 - Counter/Timer B3 Compare Registers</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CTRL3" target="_self">CTRL3 - Counter/Timer Control</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA3" target="_self">CMPRAUXA3 - Counter/Timer A3 Compare Registers</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB3" target="_self">CMPRAUXB3 - Counter/Timer B3 Compare Registers</a>
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                            <a class="el" href="#AUX3" target="_self">AUX3 - Counter/Timer Auxiliary</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR4" target="_self">TMR4 - Counter/Timer Register</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA4" target="_self">CMPRA4 - Counter/Timer A4 Compare Registers</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB4" target="_self">CMPRB4 - Counter/Timer B4 Compare Registers</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CTRL4" target="_self">CTRL4 - Counter/Timer Control</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA4" target="_self">CMPRAUXA4 - Counter/Timer A4 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
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                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB4" target="_self">CMPRAUXB4 - Counter/Timer B4 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000009C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX4" target="_self">AUX4 - Counter/Timer Auxiliary</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000A0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR5" target="_self">TMR5 - Counter/Timer Register</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000A4:</span>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA5" target="_self">CMPRA5 - Counter/Timer A5 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000A8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB5" target="_self">CMPRB5 - Counter/Timer B5 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000AC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CTRL5" target="_self">CTRL5 - Counter/Timer Control</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000B4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA5" target="_self">CMPRAUXA5 - Counter/Timer A5 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000B8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB5" target="_self">CMPRAUXB5 - Counter/Timer B5 Compare Registers</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000BC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX5" target="_self">AUX5 - Counter/Timer Auxiliary</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000C0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR6" target="_self">TMR6 - Counter/Timer Register</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000C4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA6" target="_self">CMPRA6 - Counter/Timer A6 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000C8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB6" target="_self">CMPRB6 - Counter/Timer B6 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000CC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CTRL6" target="_self">CTRL6 - Counter/Timer Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000D4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA6" target="_self">CMPRAUXA6 - Counter/Timer A6 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000D8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB6" target="_self">CMPRAUXB6 - Counter/Timer B6 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000DC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX6" target="_self">AUX6 - Counter/Timer Auxiliary</a>
                        </td>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000E0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#TMR7" target="_self">TMR7 - Counter/Timer Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000E4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRA7" target="_self">CMPRA7 - Counter/Timer A7 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000E8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRB7" target="_self">CMPRB7 - Counter/Timer B7 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000EC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CTRL7" target="_self">CTRL7 - Counter/Timer Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000F4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXA7" target="_self">CMPRAUXA7 - Counter/Timer A7 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000F8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CMPRAUXB7" target="_self">CMPRAUXB7 - Counter/Timer B7 Compare Registers</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000FC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUX7" target="_self">AUX7 - Counter/Timer Auxiliary</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000100:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#GLOBEN" target="_self">GLOBEN - Counter/Timer Global Enable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000104:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#OUTCFG0" target="_self">OUTCFG0 - Counter/Timer Output Config 0</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000108:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#OUTCFG1" target="_self">OUTCFG1 - Counter/Timer Output Config 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000010C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#OUTCFG2" target="_self">OUTCFG2 - Counter/Timer Output Config 2</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000114:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#OUTCFG3" target="_self">OUTCFG3 - Counter/Timer Output Config 3</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000118:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INCFG" target="_self">INCFG - Counter/Timer Input Config</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000140:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STCFG" target="_self">STCFG - Configuration Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000144:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STTMR" target="_self">STTMR - System Timer Count Register (Real Time Counter)</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000148:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CAPTURECONTROL" target="_self">CAPTURECONTROL - Capture Control Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000150:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR0" target="_self">SCMPR0 - Compare Register A</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000154:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR1" target="_self">SCMPR1 - Compare Register B</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000158:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR2" target="_self">SCMPR2 - Compare Register C</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000015C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR3" target="_self">SCMPR3 - Compare Register D</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000160:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR4" target="_self">SCMPR4 - Compare Register E</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000164:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR5" target="_self">SCMPR5 - Compare Register F</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000168:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR6" target="_self">SCMPR6 - Compare Register G</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000016C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCMPR7" target="_self">SCMPR7 - Compare Register H</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001E0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCAPT0" target="_self">SCAPT0 - Capture Register A</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001E4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCAPT1" target="_self">SCAPT1 - Capture Register B</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001E8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCAPT2" target="_self">SCAPT2 - Capture Register C</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001EC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCAPT3" target="_self">SCAPT3 - Capture Register D</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001F0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SNVR0" target="_self">SNVR0 - System Timer NVRAM_A Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001F4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SNVR1" target="_self">SNVR1 - System Timer NVRAM_B Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001F8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SNVR2" target="_self">SNVR2 - System Timer NVRAM_C Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001FC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SNVR3" target="_self">SNVR3 - System Timer NVRAM_D Register</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000200:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTEN" target="_self">INTEN - Counter/Timer Interrupts: Enable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000204:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTSTAT" target="_self">INTSTAT - Counter/Timer Interrupts: Status</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000208:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTCLR" target="_self">INTCLR - Counter/Timer Interrupts: Clear</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000020C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#INTSET" target="_self">INTSET - Counter/Timer Interrupts: Set</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000300:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STMINTEN" target="_self">STMINTEN - STIMER Interrupt registers: Enable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000304:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STMINTSTAT" target="_self">STMINTSTAT - STIMER Interrupt registers: Status</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000308:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STMINTCLR" target="_self">STMINTCLR - STIMER Interrupt registers: Clear</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000030C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#STMINTSET" target="_self">STMINTSET - STIMER Interrupt registers: Set</a>
                        </td>
                    </tr>

                </table>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR0" class="panel-title">TMR0 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008000</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the running time or event count for ctimer 0.  This is either for each 16 bit half or for the whole 32 bit count when the pair is linked.  If the pair is not linked, they can be running on seperate clocks and are completely independent.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB0
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB0</td>
                            <td>RO</td>
                            <td>Counter/Timer B0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA0</td>
                            <td>RO</td>
                            <td>Counter/Timer A0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA0" class="panel-title">CMPRA0 - Counter/Timer A0 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008004</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This contains the Compare limits for timer 0 A half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A0
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Compare Register 1. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Compare Register 0. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB0" class="panel-title">CMPRB0 - Counter/Timer B0 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008008</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This contains the Compare limits for timer 0 B half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B0
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B0</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Compare Register 1. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B0</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Compare Register 0. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL0" class="panel-title">CTRL0 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000800C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This includes the Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK0
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB0FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB0CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA0FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA0CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0/B0 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A0/B0 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A0/B0 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB0POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB0 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB0 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB0CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B0 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B0 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB0IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B0 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B0 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB0IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B0 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B0 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB0FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B0, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B0, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B0, assert, count to CMPR1B0, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B0, assert, count to CMPR1B0, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB0CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA0               = 0x14 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB1               = 0x15 - Clock source is CTIMERB1 OUT.<br>
                             CTMRA1               = 0x16 - Clock source is CTIMERA1 OUT.<br>
                             CTMRA2               = 0x17 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x18 - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x19 - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1A - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB0EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B0 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B0 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA0POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA0 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA0 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA0CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A0 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A0 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA0IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A0 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A0 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA0IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A0 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A0 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA0FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A0, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A0, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A0, assert, count to CMPR1A0, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A0, assert, count to CMPR1A0, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA0CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB0               = 0x14 - Clock source is CTIMERB0 OUT.<br>
                             CTMRA1               = 0x15 - Clock source is CTIMERA1 OUT.<br>
                             CTMRB1               = 0x16 - Clock source is CTIMERB1 OUT.<br>
                             CTMRA2               = 0x17 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x18 - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x19 - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1A - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA0EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A0 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A0 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA0" class="panel-title">CMPRAUXA0 - Counter/Timer A0 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008014</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.  This is valid if timer 0 is set to function 4 and function 5.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A0
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A0</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB0" class="panel-title">CMPRAUXB0 - Counter/Timer B0 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008018</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.  This is valid if timer 0 is set to function 4 and function 5.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B0
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B0</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B0</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX0" class="panel-title">AUX0 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000801C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB0NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB0TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB0LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA0NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA0TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA0LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB0EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB0POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB0TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB0NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB0TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A0OUT                = 0x1 - Trigger source is CTIMERA0 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             B2OUT                = 0x4 - Trigger source is CTIMERB2 OUT.<br>
                             B5OUT                = 0x5 - Trigger source is CTIMERB5 OUT.<br>
                             A4OUT                = 0x6 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x7 - Trigger source is CTIMERB4 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             B7OUT2               = 0xA - Trigger source is CTIMERB7 OUT2.<br>
                             A2OUT2               = 0xB - Trigger source is CTIMERA2 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B5OUT2DUAL           = 0xE - Trigger source is CTIMERB5 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xF - Trigger source is CTIMERA5 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB0LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA0EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA0POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA0TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA0NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA0TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B0OUT                = 0x1 - Trigger source is CTIMERB0 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A1OUT                = 0x4 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x5 - Trigger source is CTIMERB1 OUT.<br>
                             A5OUT                = 0x6 - Trigger source is CTIMERA5 OUT.<br>
                             B5OUT                = 0x7 - Trigger source is CTIMERB5 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             B6OUT2               = 0xA - Trigger source is CTIMERB6 OUT2.<br>
                             A2OUT2               = 0xB - Trigger source is CTIMERA2 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA0LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR1" class="panel-title">TMR1 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008020</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the running time or event count for ctimer 1.  This is either for each 16 bit half or for the whole 32 bit count when the pair is linked.  If the pair is not linked, they can be running on seperate clocks and are completely independent.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB1
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB1</td>
                            <td>RO</td>
                            <td>Counter/Timer B1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA1</td>
                            <td>RO</td>
                            <td>Counter/Timer A1.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA1" class="panel-title">CMPRA1 - Counter/Timer A1 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008024</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This contains the Compare limits for timer 1 A half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A1
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB1" class="panel-title">CMPRB1 - Counter/Timer B1 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008028</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This contains the Compare limits for timer 1 B half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B1
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B1</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B1</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL1" class="panel-title">CTRL1 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000802C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This includes the Control bit fields for both halves of timer 1.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK1
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB1FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB1CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA1FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA1CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1/B1 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A1/B1 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A1/B1 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB1POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB1 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB1 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB1CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B1 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B1 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB1IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B1 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B1 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB1IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B1 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B1 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB1FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B1, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B1, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B1, assert, count to CMPR1B1, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B1, assert, count to CMPR1B1, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB1CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA1               = 0x14 - Clock source is CTIMERA1 OUT.<br>
                             CTMRA0               = 0x15 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x16 - Clock source is CTIMERB0 OUT.<br>
                             CTMRA2               = 0x17 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x18 - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x19 - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1A - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB1EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B1 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B1 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA1POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA1 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA1 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA1CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A1 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A1 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA1IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A1 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A1 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA1IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A1 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A1 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA1FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A1, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A1, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A1, assert, count to CMPR1A1, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A1, assert, count to CMPR1A1, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM<br>
                             TRIGCOPY             = 0x7 - Replicate the trigger input<br>
                             DUALTRIGPATTERN      = 0x4 - Single pattern, trigger on either edge.</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA1CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB1               = 0x14 - Clock source is CTIMERB1 OUT.<br>
                             CTMRA0               = 0x15 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x16 - Clock source is CTIMERB0 OUT.<br>
                             CTMRA2               = 0x17 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x18 - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x19 - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1A - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA1EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A1 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A1 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA1" class="panel-title">CMPRAUXA1 - Counter/Timer A1 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008034</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.  This is valid if timer 1 is set to function 4 and function 5.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A1
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A1</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB1" class="panel-title">CMPRAUXB1 - Counter/Timer B1 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008038</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.  This is valid if timer 1 is set to function 4 and function 5.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B1
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B1</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B1</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX1" class="panel-title">AUX1 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000803C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB1NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB1TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB1LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA1NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA1TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA1LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB1EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB1POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB1TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB1NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB1TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A1OUT                = 0x1 - Trigger source is CTIMERA1 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A6OUT                = 0x4 - Trigger source is CTIMERA6 OUT.<br>
                             B6OUT                = 0x5 - Trigger source is CTIMERB6 OUT.<br>
                             A0OUT                = 0x6 - Trigger source is CTIMERA0 OUT.<br>
                             B0OUT                = 0x7 - Trigger source is CTIMERB0 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A4OUT2               = 0xA - Trigger source is CTIMERA4 OUT2.<br>
                             B4OUT2               = 0xB - Trigger source is CTIMERB4 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B5OUT2DUAL           = 0xE - Trigger source is CTIMERB5 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xF - Trigger source is CTIMERA5 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB1LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA1EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA1POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Upper output polarity<br><br>
                                 NORMAL               = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA1TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA1NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA1TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B1OUT                = 0x1 - Trigger source is CTIMERB1 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A0OUT                = 0x4 - Trigger source is CTIMERA0 OUT.<br>
                             B0OUT                = 0x5 - Trigger source is CTIMERB0 OUT.<br>
                             A5OUT                = 0x6 - Trigger source is CTIMERA5 OUT.<br>
                             B5OUT                = 0x7 - Trigger source is CTIMERB5 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A4OUT2               = 0xA - Trigger source is CTIMERA4 OUT2.<br>
                             B4OUT2               = 0xB - Trigger source is CTIMERB4 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B5OUT2DUAL           = 0xE - Trigger source is CTIMERB5 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xF - Trigger source is CTIMERA5 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA1LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR2" class="panel-title">TMR2 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008040</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the running time or event count for ctimer 2.  This is either for each 16 bit half or for the whole 32 bit count when the pair is linked.  If the pair is not linked, they can be running on seperate clocks and are completely independent.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB2
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB2</td>
                            <td>RO</td>
                            <td>Counter/Timer B2.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA2</td>
                            <td>RO</td>
                            <td>Counter/Timer A2.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA2" class="panel-title">CMPRA2 - Counter/Timer A2 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008044</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer 2 A half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A2
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A2</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A2</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB2" class="panel-title">CMPRB2 - Counter/Timer B2 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008048</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer 2 B half.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B2
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B2</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B2</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL2" class="panel-title">CTRL2 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000804C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the control bit fields for both halves of timer 2.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK2
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB2FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB2CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA2FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA2CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK2</td>
                            <td>RW</td>
                            <td>Counter/Timer A2/B2 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A2/B2 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A2/B2 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB2POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB2 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB2 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB2CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B2 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B2 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB2IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B2 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B2 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB2IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B2 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B2 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB2FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B2, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B2, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B2, assert, count to CMPR1B2, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B2, assert, count to CMPR1B2, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB2CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA2               = 0x14 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB3               = 0x15 - Clock source is CTIMERA3 OUT.<br>
                             CTMRA3               = 0x16 - Clock source is CTIMERB3 OUT.<br>
                             CTMRA4               = 0x17 - Clock source is CTIMERA4 OUT.<br>
                             CTMRB4               = 0x18 - Clock source is CTIMERB4 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB2EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B2 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B2 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA2POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA2 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA2 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA2CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A2 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A2 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA2IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A2 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A2 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA2IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A2 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A2 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA2FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A2, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A2, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A2, assert, count to CMPR1A2, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A2, assert, count to CMPR1A2, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA2CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB2               = 0x14 - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x15 - Clock source is CTIMERA3 OUT.<br>
                             CTMRA3               = 0x16 - Clock source is CTIMERB3 OUT.<br>
                             CTMRA4               = 0x17 - Clock source is CTIMERA4 OUT.<br>
                             CTMRB4               = 0x18 - Clock source is CTIMERB4 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA2EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A2 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A2 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA2" class="panel-title">CMPRAUXA2 - Counter/Timer A2 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008054</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A2
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A2</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A2</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB2" class="panel-title">CMPRAUXB2 - Counter/Timer B2 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008058</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B2
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B2</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B2</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX2" class="panel-title">AUX2 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000805C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB2NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB2TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB2LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA2NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA2TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA2LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB2EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB2POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB2TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB2NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB2TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A2OUT                = 0x1 - Trigger source is CTIMERA2 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A1OUT                = 0x4 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x5 - Trigger source is CTIMERB1 OUT.<br>
                             A4OUT                = 0x6 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x7 - Trigger source is CTIMERB4 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A5OUT2               = 0xA - Trigger source is CTIMERA5 OUT2.<br>
                             B5OUT2               = 0xB - Trigger source is CTIMERB5 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB2LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA2EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA2POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA2TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA2NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA2TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B2OUT                = 0x1 - Trigger source is CTIMERB2 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A0OUT                = 0x4 - Trigger source is CTIMERA0 OUT.<br>
                             B0OUT                = 0x5 - Trigger source is CTIMERB0 OUT.<br>
                             A4OUT                = 0x6 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x7 - Trigger source is CTIMERB4 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A5OUT2               = 0xA - Trigger source is CTIMERA5 OUT2.<br>
                             B5OUT2               = 0xB - Trigger source is CTIMERB5 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA2LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR3" class="panel-title">TMR3 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008060</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Counter/Timer Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB3
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB3</td>
                            <td>RO</td>
                            <td>Counter/Timer B3.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA3</td>
                            <td>RO</td>
                            <td>Counter/Timer A3.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA3" class="panel-title">CMPRA3 - Counter/Timer A3 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008064</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A3
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A3</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A3</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB3" class="panel-title">CMPRB3 - Counter/Timer B3 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008068</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B3
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B3</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B3</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL3" class="panel-title">CTRL3 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000806C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the control bit fields for both halves of timer 3.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK3
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB3FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB3CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3EN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCEN
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA3FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA3CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK3</td>
                            <td>RW</td>
                            <td>Counter/Timer A3/B3 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A3/B3 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A3/B3 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB3POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB3 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB3 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB3CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B3 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B3 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB3IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B3 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B3 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB3IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B3 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B3 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB3FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B3, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B3, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B3, assert, count to CMPR1B3, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B3, assert, count to CMPR1B3, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB3CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA3               = 0x14 - Clock source is CTIMERA3 OUT.<br>
                             CTMRA2               = 0x15 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x16 - Clock source is CTIMERB2 OUT.<br>
                             CTMRA4               = 0x17 - Clock source is CTIMERA4 OUT.<br>
                             CTMRB4               = 0x18 - Clock source is CTIMERB4 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB3EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B3 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B3 Enable.</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>ADCEN</td>
                            <td>RW</td>
                            <td>Special Timer A3 enable for ADC function.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA3POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA3 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA3 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA3CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A3 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A3 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA3IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A3 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A3 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA3IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A3 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A3 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA3FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A3, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A3, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A3, assert, count to CMPR1A3, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A3, assert, count to CMPR1A3, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA3CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB3               = 0x14 - Clock source is CTIMERB3 OUT.<br>
                             CTMRA2               = 0x15 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x16 - Clock source is CTIMERB2 OUT.<br>
                             CTMRA4               = 0x17 - Clock source is CTIMERA4 OUT.<br>
                             CTMRB4               = 0x18 - Clock source is CTIMERB4 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB5               = 0x1B - Clock source is CTIMERB5 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA3EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A3 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A3 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA3" class="panel-title">CMPRAUXA3 - Counter/Timer A3 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008074</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A3
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A3</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A3</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB3" class="panel-title">CMPRAUXB3 - Counter/Timer B3 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008078</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B3
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B3</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B3</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX3" class="panel-title">AUX3 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000807C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB3NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB3TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB3LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA3NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA3TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA3LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB3EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB3POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB3TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB3NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB3TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A3OUT                = 0x1 - Trigger source is CTIMERA3 OUT.<br>
                             B2OUT                = 0x2 - Trigger source is CTIMERB2 OUT.<br>
                             A2OUT                = 0x3 - Trigger source is CTIMERA2 OUT.<br>
                             A4OUT                = 0x4 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x5 - Trigger source is CTIMERB4 OUT.<br>
                             A6OUT                = 0x6 - Trigger source is CTIMERA6 OUT.<br>
                             B6OUT                = 0x7 - Trigger source is CTIMERB6 OUT.<br>
                             B5OUT2               = 0x8 - Trigger source is CTIMERB5 OUT2.<br>
                             A5OUT2               = 0x9 - Trigger source is CTIMERA5 OUT2.<br>
                             A1OUT2               = 0xA - Trigger source is CTIMERA1 OUT2.<br>
                             B1OUT2               = 0xB - Trigger source is CTIMERB1 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B2OUT2DUAL           = 0xE - Trigger source is CTIMERB2 OUT2, dual edge.<br>
                             A2OUT2DUAL           = 0xF - Trigger source is CTIMERA2 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB3LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA3EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA3POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA3TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA3NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA3TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B3OUT                = 0x1 - Trigger source is CTIMERB3 OUT.<br>
                             B2OUT                = 0x2 - Trigger source is CTIMERB2 OUT.<br>
                             A2OUT                = 0x3 - Trigger source is CTIMERA2 OUT.<br>
                             A4OUT                = 0x4 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x5 - Trigger source is CTIMERB4 OUT.<br>
                             A7OUT                = 0x6 - Trigger source is CTIMERA7 OUT.<br>
                             B7OUT                = 0x7 - Trigger source is CTIMERB7 OUT.<br>
                             B5OUT2               = 0x8 - Trigger source is CTIMERB5 OUT2.<br>
                             A5OUT2               = 0x9 - Trigger source is CTIMERA5 OUT2.<br>
                             A1OUT2               = 0xA - Trigger source is CTIMERA1 OUT2.<br>
                             B1OUT2               = 0xB - Trigger source is CTIMERB1 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B2OUT2DUAL           = 0xE - Trigger source is CTIMERB2 OUT2, dual edge.<br>
                             A2OUT2DUAL           = 0xF - Trigger source is CTIMERA2 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA3LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR4" class="panel-title">TMR4 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008080</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the running time or event count, either for each 16 bit half or for the whole 32 bit count when the pair is linked.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB4
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB4</td>
                            <td>RO</td>
                            <td>Counter/Timer B4.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA4</td>
                            <td>RO</td>
                            <td>Counter/Timer A4.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA4" class="panel-title">CMPRA4 - Counter/Timer A4 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008084</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A4
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A4</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Compare Register 1. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A4</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Compare Register 0. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB4" class="panel-title">CMPRB4 - Counter/Timer B4 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008088</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B4
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B4</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Compare Register 1. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B4</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Compare Register 0. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL4" class="panel-title">CTRL4 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000808C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 4.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK4
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB4FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB4CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA4FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA4CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK4</td>
                            <td>RW</td>
                            <td>Counter/Timer A4/B4 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A4/B4 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A4/B4 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB4POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB4 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB4 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB4CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B4 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B4 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB4IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B4 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B4 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB4IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B4 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B4 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB4FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B4, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B4, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B4, assert, count to CMPR1B4, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B4, assert, count to CMPR1B4, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB4CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA4               = 0x14 - Clock source is CTIMERA4 OUT.<br>
                             CTMRA1               = 0x15 - Clock source is CTIMERA1 OUT.<br>
                             CTMRB1               = 0x16 - Clock source is CTIMERB1 OUT.<br>
                             CTMRA5               = 0x17 - Clock source is CTIMERA5 OUT.<br>
                             CTMRB5               = 0x18 - Clock source is CTIMERB5 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB2               = 0x1A - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x1B - Clock source is CTIMERB3 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB4EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B4 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B4 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA4POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA4 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA4 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA4CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A4 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A4 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA4IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A4 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A4 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA4IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A4 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A4 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA4FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A4, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A4, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A4, assert, count to CMPR1A4, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A4, assert, count to CMPR1A4, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA4CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4. (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB4               = 0x14 - Clock source is CTIMERB4 OUT.<br>
                             CTMRA1               = 0x15 - Clock source is CTIMERA1 OUT.<br>
                             CTMRB1               = 0x16 - Clock source is CTIMERB1 OUT.<br>
                             CTMRA5               = 0x17 - Clock source is CTIMERA5 OUT.<br>
                             CTMRB5               = 0x18 - Clock source is CTIMERB5 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB2               = 0x1A - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x1B - Clock source is CTIMERB3 OUT.<br>
                             CTMRB6               = 0x1C - Clock source is CTIMERB6 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA4EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A4 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A4 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA4" class="panel-title">CMPRAUXA4 - Counter/Timer A4 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008094</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A4
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A4</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A4</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB4" class="panel-title">CMPRAUXB4 - Counter/Timer B4 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008098</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B4
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B4</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B4</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX4" class="panel-title">AUX4 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000809C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 4.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB4NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB4TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB4LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA4NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA4TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA4LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB4EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB4POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB4TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB4NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB4TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A4OUT                = 0x1 - Trigger source is CTIMERA4 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A7OUT                = 0x4 - Trigger source is CTIMERA7 OUT.<br>
                             B7OUT                = 0x5 - Trigger source is CTIMERB7 OUT.<br>
                             A1OUT                = 0x6 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x7 - Trigger source is CTIMERB1 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A1OUT2               = 0xA - Trigger source is CTIMERA1 OUT2.<br>
                             B1OUT2               = 0xB - Trigger source is CTIMERB1 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B5OUT2DUAL           = 0xE - Trigger source is CTIMERB5 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xF - Trigger source is CTIMERA5 OUT2, dual edge.<br>
                             STIMERCAP0           = 0x4 - Trigger source is STimer Capture0 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP1           = 0x5 - Trigger source is STimer Capture1 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP2           = 0x6 - Trigger source is STimer Capture2 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP3           = 0x7 - Trigger source is STimer Capture3 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP0           = 0x8 - Trigger source is STimer Compare0 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP1           = 0x9 - Trigger source is STimer Compare1 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP2           = 0xA - Trigger source is STimer Compare2 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP3           = 0xB - Trigger source is STimer Compare3 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP4           = 0xC - Trigger source is STimer Compare4 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP5           = 0xD - Trigger source is STimer Compare5 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP6           = 0xE - Trigger source is STimer Compare6 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP7           = 0xF - Trigger source is STimer Compare7 Interrupt.  When CTLINK==1 and TMRA4TRIG==1.  (Apollo3 - B0)</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB4LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA4EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA4POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA4TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA4NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA4TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             STIMER               = 0x1 - Trigger source is STimer Interrupt.  Only Active When CTLINK==1 and TMRB4TRIG!=0.  TMRB4TRIG selects an STIMER interrupt<br>
                             B4OUT                = 0x1 - Trigger source is CTIMERB4 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A6OUT                = 0x4 - Trigger source is CTIMERA6 OUT.<br>
                             B6OUT                = 0x5 - Trigger source is CTIMERB6 OUT.<br>
                             A2OUT                = 0x6 - Trigger source is CTIMERA2 OUT.<br>
                             B2OUT                = 0x7 - Trigger source is CTIMERB2 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A1OUT2               = 0xA - Trigger source is CTIMERA1 OUT2.<br>
                             B1OUT2               = 0xB - Trigger source is CTIMERB1 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B5OUT2DUAL           = 0xE - Trigger source is CTIMERB5 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xF - Trigger source is CTIMERA5 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA4LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR5" class="panel-title">TMR5 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080A0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the running time or event count, either for each 16 bit half or for the whole 32 bit count when the pair is linked.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB5
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB5</td>
                            <td>RO</td>
                            <td>Counter/Timer B5.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA5</td>
                            <td>RO</td>
                            <td>Counter/Timer A5.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA5" class="panel-title">CMPRA5 - Counter/Timer A5 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080A4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A5
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A5</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A5</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB5" class="panel-title">CMPRB5 - Counter/Timer B5 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080A8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B5
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B5</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B5</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL5" class="panel-title">CTRL5 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080AC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK5
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB5FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB5CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA5FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA5CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK5</td>
                            <td>RW</td>
                            <td>Counter/Timer A5/B5 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A5/B5 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A5/B5 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB5POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB5 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB5 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB5CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B5 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B5 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB5IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B5 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B5 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB5IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B5 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B5 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB5FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B5, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B5, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B5, assert, count to CMPR1B5, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B5, assert, count to CMPR1B5, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB5CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA5               = 0x14 - Clock source is CTIMERA5 OUT.<br>
                             CTMRA0               = 0x15 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x16 - Clock source is CTIMERB0 OUT.<br>
                             CTMRA6               = 0x17 - Clock source is CTIMERA6 OUT.<br>
                             CTMRB6               = 0x18 - Clock source is CTIMERB6 OUT.<br>
                             CTMRB1               = 0x19 - Clock source is CTIMERB1 OUT.<br>
                             CTMRB2               = 0x1A - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x1B - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1C - Clock source is CTIMERB4 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB5EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B5 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B5 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA5POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA5 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA5 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA5CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A5 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A5 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA5IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A5 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A5 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA5IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A5 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A5 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA5FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A5, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A5, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A5, assert, count to CMPR1A5, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A5, assert, count to CMPR1A5, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM<br>
                             TRIGCOPY             = 0x7 - Replicate the trigger input<br>
                             DUALTRIGPATTERN      = 0x4 - Single pattern, trigger on either edge.</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA5CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB5               = 0x14 - Clock source is CTIMERB5 OUT.<br>
                             CTMRA0               = 0x15 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x16 - Clock source is CTIMERB0 OUT.<br>
                             CTMRA6               = 0x17 - Clock source is CTIMERA6 OUT.<br>
                             CTMRB6               = 0x18 - Clock source is CTIMERB6 OUT.<br>
                             CTMRB1               = 0x19 - Clock source is CTIMERB1 OUT.<br>
                             CTMRB2               = 0x1A - Clock source is CTIMERB2 OUT.<br>
                             CTMRB3               = 0x1B - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1C - Clock source is CTIMERB4 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA5EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A5 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A5 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA5" class="panel-title">CMPRAUXA5 - Counter/Timer A5 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080B4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A5
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A5</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A5</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB5" class="panel-title">CMPRAUXB5 - Counter/Timer B5 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080B8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B5
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B5</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B5</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX5" class="panel-title">AUX5 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080BC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB5NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB5TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB5LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA5NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA5TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA5LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB5EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB5POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB5TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB5NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB5TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A5OUT                = 0x1 - Trigger source is CTIMERA5 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A6OUT                = 0x4 - Trigger source is CTIMERA6 OUT.<br>
                             B6OUT                = 0x5 - Trigger source is CTIMERB6 OUT.<br>
                             A1OUT                = 0x6 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x7 - Trigger source is CTIMERB1 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A0OUT2               = 0xA - Trigger source is CTIMERA0 OUT2.<br>
                             B0OUT2               = 0xB - Trigger source is CTIMERB0 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.<br>
                             STIMERCAP0           = 0x4 - Trigger source is STimer Capture0 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP1           = 0x5 - Trigger source is STimer Capture1 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP2           = 0x6 - Trigger source is STimer Capture2 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCAP3           = 0x7 - Trigger source is STimer Capture3 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP0           = 0x8 - Trigger source is STimer Compare0 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP1           = 0x9 - Trigger source is STimer Compare1 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP2           = 0xA - Trigger source is STimer Compare2 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP3           = 0xB - Trigger source is STimer Compare3 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP4           = 0xC - Trigger source is STimer Compare4 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP5           = 0xD - Trigger source is STimer Compare5 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP6           = 0xE - Trigger source is STimer Compare6 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)<br>
                             STIMERCMP7           = 0xF - Trigger source is STimer Compare7 Interrupt.  When CTLINK==1 and TMRA5TRIG==1.  (Apollo3 - B0)</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB5LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA5EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA5POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Upper output polarity<br><br>
                                 NORMAL               = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA5TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA5NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA5TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             STIMER               = 0x1 - Trigger source is STimer Interrupt.  Only Active When CTLINK==1 and TMRB5TRIG!=0.  TMRB5TRIG selects an STIMER interrupt<br>
                             B5OUT                = 0x1 - Trigger source is CTIMERB5 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A4OUT                = 0x4 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x5 - Trigger source is CTIMERB4 OUT.<br>
                             A2OUT                = 0x6 - Trigger source is CTIMERA2 OUT.<br>
                             B2OUT                = 0x7 - Trigger source is CTIMERB2 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A0OUT2               = 0xA - Trigger source is CTIMERA0 OUT2.<br>
                             B0OUT2               = 0xB - Trigger source is CTIMERB0 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA5LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR6" class="panel-title">TMR6 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080C0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Counter/Timer Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB6
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB6</td>
                            <td>RO</td>
                            <td>Counter/Timer B6.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA6</td>
                            <td>RO</td>
                            <td>Counter/Timer A6.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA6" class="panel-title">CMPRA6 - Counter/Timer A6 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080C4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A6
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A6</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A6</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB6" class="panel-title">CMPRB6 - Counter/Timer B6 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080C8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B6
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B6</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B6</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL6" class="panel-title">CTRL6 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080CC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the control bit fields for both halves of timer 6.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK6
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB6FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB6CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA6FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA6CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK6</td>
                            <td>RW</td>
                            <td>Counter/Timer A6/B6 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A6/B6 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A6/B6 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB6POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB6 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB6 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB6CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B6 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B6 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB6IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B6 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B6 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB6IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B6 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B6 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB6FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B6, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B6, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B6, assert, count to CMPR1B6, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B6, assert, count to CMPR1B6, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB6CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA6               = 0x14 - Clock source is CTIMERA6 OUT.<br>
                             CTMRA3               = 0x15 - Clock source is CTIMERA3 OUT.<br>
                             CTMRB3               = 0x16 - Clock source is CTIMERB3 OUT.<br>
                             CTMRA7               = 0x17 - Clock source is CTIMERA7 OUT.<br>
                             CTMRB7               = 0x18 - Clock source is CTIMERB7 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB2               = 0x1B - Clock source is CTIMERB2 OUT.<br>
                             CTMRB4               = 0x1C - Clock source is CTIMERB4 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB6EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B6 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B6 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA6POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA6 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA6 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA6CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A6 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A6 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA6IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A6 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A6 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA6IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A6 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A6 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA6FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A6, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A6, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A6, assert, count to CMPR1A6, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A6, assert, count to CMPR1A6, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA6CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB6               = 0x14 - Clock source is CTIMERB6 OUT.<br>
                             CTMRA3               = 0x15 - Clock source is CTIMERA3 OUT.<br>
                             CTMRB3               = 0x16 - Clock source is CTIMERB3 OUT.<br>
                             CTMRA7               = 0x17 - Clock source is CTIMERA7 OUT.<br>
                             CTMRB7               = 0x18 - Clock source is CTIMERB7 OUT.<br>
                             CTMRB0               = 0x19 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x1A - Clock source is CTIMERB1 OUT.<br>
                             CTMRB2               = 0x1B - Clock source is CTIMERB2 OUT.<br>
                             CTMRB4               = 0x1C - Clock source is CTIMERB4 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA6EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A6 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A6 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA6" class="panel-title">CMPRAUXA6 - Counter/Timer A6 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080D4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A6
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A6</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A6</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB6" class="panel-title">CMPRAUXB6 - Counter/Timer B6 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080D8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B6
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B6</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B6</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX6" class="panel-title">AUX6 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080DC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB6NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB6TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB6LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA6NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA6TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA6LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB6EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB6POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB6TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB6NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB6TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A6OUT                = 0x1 - Trigger source is CTIMERA6 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A4OUT                = 0x4 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x5 - Trigger source is CTIMERB4 OUT.<br>
                             A1OUT                = 0x6 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x7 - Trigger source is CTIMERB1 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A2OUT2               = 0xA - Trigger source is CTIMERA2 OUT2.<br>
                             B2OUT2               = 0xB - Trigger source is CTIMERB2 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B0OUT2DUAL           = 0xE - Trigger source is CTIMERB0 OUT2, dual edge.<br>
                             A0OUT2DUAL           = 0xF - Trigger source is CTIMERA0 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB6LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA6EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA6POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA6TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA6NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA6TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B6OUT                = 0x1 - Trigger source is CTIMERB6 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A5OUT                = 0x4 - Trigger source is CTIMERA5 OUT.<br>
                             B5OUT                = 0x5 - Trigger source is CTIMERB5 OUT.<br>
                             A1OUT                = 0x6 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x7 - Trigger source is CTIMERB1 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A2OUT2               = 0xA - Trigger source is CTIMERA2 OUT2.<br>
                             B2OUT2               = 0xB - Trigger source is CTIMERBb OUT2.<br>
                             A5OUT2DUAL           = 0xC - Trigger source is CTIMERA5 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B0OUT2DUAL           = 0xE - Trigger source is CTIMERB0 OUT2, dual edge.<br>
                             A0OUT2DUAL           = 0xF - Trigger source is CTIMERA0 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA6LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="TMR7" class="panel-title">TMR7 - Counter/Timer Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080E0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Counter/Timer Register</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CTTMRB7
                                <br>0x0</td>

                            <td align="center" colspan="16">CTTMRA7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CTTMRB7</td>
                            <td>RO</td>
                            <td>Counter/Timer B7.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CTTMRA7</td>
                            <td>RO</td>
                            <td>Counter/Timer A7.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRA7" class="panel-title">CMPRA7 - Counter/Timer A7 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080E4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1A7
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0A7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1A7</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0A7</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRB7" class="panel-title">CMPRB7 - Counter/Timer B7 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080E8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR1B7
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR0B7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR1B7</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR0B7</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 Compare Register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CTRL7" class="panel-title">CTRL7 - Counter/Timer Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080EC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This register holds the control bit fields for both halves of timer 7.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTLINK7
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRB7FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRB7CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7EN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7POL
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7CLR
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7IE1
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7IE0
                                <br>0x0</td>

                            <td align="center" colspan="3">TMRA7FN
                                <br>0x0</td>

                            <td align="center" colspan="5">TMRA7CLK
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7EN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTLINK7</td>
                            <td>RW</td>
                            <td>Counter/Timer A7/B7 Link bit.<br><br>
                                 TWO_16BIT_TIMERS     = 0x0 - Use A7/B7 timers as two independent 16-bit timers (default).<br>
                             32BIT_TIMER          = 0x1 - Link A7/B7 timers into a single 32-bit timer.</td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB7POL</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINB7 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINB7 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB7CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer B7 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer B7 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>TMRB7IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Interrupt Enable bit for COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B7 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer B7 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>TMRB7IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Interrupt Enable bit for COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer B7 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer B7 to generate an interrupt based on COMPR0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>TMRB7FN</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0B7, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0B7, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0B7, assert, count to CMPR1B7, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0B7, assert, count to CMPR1B7, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>TMRB7CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINB.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRA7               = 0x14 - Clock source is CTIMERA7 OUT.<br>
                             CTMRA2               = 0x15 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x16 - Clock source is CTIMERB2 OUT.<br>
                             CTMRA0               = 0x17 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x18 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x19 - Clock source is CTIMERB1 OUT.<br>
                             CTMRB3               = 0x1A - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1B - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1C - Clock source is CTIMERB5 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>TMRB7EN</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer B7 Disable.<br>
                             EN                   = 0x1 - Counter/Timer B7 Enable.</td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA7POL</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 output polarity.<br><br>
                                 NORMAL               = 0x0 - The polarity of the TMRPINA7 pin is the same as the timer output.<br>
                             INVERTED             = 0x1 - The polarity of the TMRPINA7 pin is the inverse of the timer output.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA7CLR</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Clear bit.<br><br>
                                 RUN                  = 0x0 - Allow counter/timer A7 to run<br>
                             CLEAR                = 0x1 - Holds counter/timer A7 at 0x0000.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>TMRA7IE1</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Interrupt Enable bit based on COMPR1.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A7 from generating an interrupt based on COMPR1.<br>
                             EN                   = 0x1 - Enable counter/timer A7 to generate an interrupt based on COMPR1.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>TMRA7IE0</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Interrupt Enable bit based on COMPR0.<br><br>
                                 DIS                  = 0x0 - Disable counter/timer A7 from generating an interrupt based on COMPR0.<br>
                             EN                   = 0x1 - Enable counter/timer A7 to generate an interrupt based on COMPR0.</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>TMRA7FN</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Function Select.<br><br>
                                 SINGLECOUNT          = 0x0 - Single count (output toggles and sticks).  Count to CMPR0A7, stop.<br>
                             REPEATEDCOUNT        = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses).  Count to CMPR0A7, restart.<br>
                             PULSE_ONCE           = 0x2 - Pulse once (aka one-shot).  Count to CMPR0A7, assert, count to CMPR1A7, deassert, stop.<br>
                             PULSE_CONT           = 0x3 - Pulse continously.  Count to CMPR0A7, assert, count to CMPR1A7, deassert, restart.<br>
                             SINGLEPATTERN        = 0x4 - Single pattern.<br>
                             REPEATPATTERN        = 0x5 - Repeated pattern.<br>
                             CONTINUOUS           = 0x6 - Continuous run (aka Free Run).  Count continuously.<br>
                             ALTPWN               = 0x7 - Alternate PWM</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TMRA7CLK</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Clock Select.<br><br>
                                 TMRPIN               = 0x0 - Clock source is TMRPINA.<br>
                             HFRC_DIV4            = 0x1 - Clock source is the HFRC / 4<br>
                             HFRC_DIV16           = 0x2 - Clock source is HFRC / 16<br>
                             HFRC_DIV256          = 0x3 - Clock source is HFRC / 256<br>
                             HFRC_DIV1024         = 0x4 - Clock source is HFRC / 1024<br>
                             HFRC_DIV4K           = 0x5 - Clock source is HFRC / 4096<br>
                             XT                   = 0x6 - Clock source is the XT (uncalibrated).<br>
                             XT_DIV2              = 0x7 - Clock source is XT / 2<br>
                             XT_DIV16             = 0x8 - Clock source is XT / 16<br>
                             XT_DIV128            = 0x9 - Clock source is XT / 128<br>
                             LFRC_DIV2            = 0xA - Clock source is LFRC / 2<br>
                             LFRC_DIV32           = 0xB - Clock source is LFRC / 32<br>
                             LFRC_DIV1K           = 0xC - Clock source is LFRC / 1024<br>
                             LFRC                 = 0xD - Clock source is LFRC<br>
                             RTC_100HZ            = 0xE - Clock source is 100 Hz from the current RTC oscillator.<br>
                             HCLK_DIV4            = 0xF - Clock source is HCLK / 4 (note: this clock is only available when MCU is in active mode)<br>
                             XT_DIV4              = 0x10 - Clock source is XT / 4<br>
                             XT_DIV8              = 0x11 - Clock source is XT / 8<br>
                             XT_DIV32             = 0x12 - Clock source is XT / 32<br>
                             RSVD                 = 0x13 - Clock source is Reserved.<br>
                             CTMRB7               = 0x14 - Clock source is CTIMERB7 OUT.<br>
                             CTMRA2               = 0x15 - Clock source is CTIMERA2 OUT.<br>
                             CTMRB2               = 0x16 - Clock source is CTIMERB2 OUT.<br>
                             CTMRA0               = 0x17 - Clock source is CTIMERA0 OUT.<br>
                             CTMRB0               = 0x18 - Clock source is CTIMERB0 OUT.<br>
                             CTMRB1               = 0x19 - Clock source is CTIMERB1 OUT.<br>
                             CTMRB3               = 0x1A - Clock source is CTIMERB3 OUT.<br>
                             CTMRB4               = 0x1B - Clock source is CTIMERB4 OUT.<br>
                             CTMRB5               = 0x1C - Clock source is CTIMERB5 OUT.<br>
                             BUCKBLE              = 0x1D - Clock source is BLE buck converter TON pulses.<br>
                             BUCKB                = 0x1E - Clock source is Memory buck converter TON pulses.<br>
                             BUCKA                = 0x1F - Clock source is CPU buck converter TON pulses.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TMRA7EN</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Enable bit.<br><br>
                                 DIS                  = 0x0 - Counter/Timer A7 Disable.<br>
                             EN                   = 0x1 - Counter/Timer A7 Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXA7" class="panel-title">CMPRAUXA7 - Counter/Timer A7 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080F4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half A.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3A7
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2A7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3A7</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Compare Register 3. Holds the upper limit for timer half A.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2A7</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Compare Register 2. Holds the lower limit for timer half A.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CMPRAUXB7" class="panel-title">CMPRAUXB7 - Counter/Timer B7 Compare Registers</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080F8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Enhanced compare limits for timer half B.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">CMPR3B7
                                <br>0x0</td>

                            <td align="center" colspan="16">CMPR2B7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>CMPR3B7</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Compare Register 3. Holds the upper limit for timer half B.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>CMPR2B7</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Compare Register 2. Holds the lower limit for timer half B.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUX7" class="panel-title">AUX7 - Counter/Timer Auxiliary</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400080FC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit fields for both halves of timer 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRB7NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRB7TRIG
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">TMRB7LMT
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7EN23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7POL23
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7TINV
                                <br>0x0</td>

                            <td align="center" colspan="1">TMRA7NOSYNC
                                <br>0x0</td>

                            <td align="center" colspan="4">TMRA7TRIG
                                <br>0x0</td>

                            <td align="center" colspan="7">TMRA7LMT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>TMRB7EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TMRB7POL23</td>
                            <td>RW</td>
                            <td>Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TMRB7TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>TMRB7NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>26:23</td>
                            <td>TMRB7TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             A7OUT                = 0x1 - Trigger source is CTIMERA7 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A5OUT                = 0x4 - Trigger source is CTIMERA5 OUT.<br>
                             B5OUT                = 0x5 - Trigger source is CTIMERB5 OUT.<br>
                             A2OUT                = 0x6 - Trigger source is CTIMERA2 OUT.<br>
                             B2OUT                = 0x7 - Trigger source is CTIMERB2 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A2OUT2               = 0xA - Trigger source is CTIMERA2 OUT2.<br>
                             B2OUT2               = 0xB - Trigger source is CTIMERB2 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A7OUT2DUAL           = 0xD - Trigger source is CTIMERA7 OUT2, dual edge.<br>
                             B1OUT2DUAL           = 0xE - Trigger source is CTIMERB1 OUT2, dual edge.<br>
                             A1OUT2DUAL           = 0xF - Trigger source is CTIMERA1 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:16</td>
                            <td>TMRB7LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>TMRA7EN23</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Upper compare enable.<br><br>
                                 DIS                  = 0x1 - Disable enhanced functions.<br>
                             EN                   = 0x0 - Enable enhanced functions.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>TMRA7POL23</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Upper output polarity<br><br>
                                 NORM                 = 0x0 - Upper output normal polarity<br>
                             INV                  = 0x1 - Upper output inverted polarity.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>TMRA7TINV</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Invert on trigger.<br><br>
                                 DIS                  = 0x0 - Disable invert on trigger<br>
                             EN                   = 0x1 - Enable invert on trigger</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>TMRA7NOSYNC</td>
                            <td>RW</td>
                            <td>Source clock synchronization control.<br><br>
                                 DIS                  = 0x0 - Synchronization on source clock<br>
                             NOSYNC               = 0x1 - No synchronization on source clock</td>
                        </tr>

                        <tr>
                            <td>10:7</td>
                            <td>TMRA7TRIG</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Trigger Select.<br><br>
                                 DIS                  = 0x0 - Trigger source is disabled.<br>
                             B7OUT                = 0x1 - Trigger source is CTIMERB7 OUT.<br>
                             B3OUT                = 0x2 - Trigger source is CTIMERB3 OUT.<br>
                             A3OUT                = 0x3 - Trigger source is CTIMERA3 OUT.<br>
                             A1OUT                = 0x4 - Trigger source is CTIMERA1 OUT.<br>
                             B1OUT                = 0x5 - Trigger source is CTIMERB1 OUT.<br>
                             A4OUT                = 0x6 - Trigger source is CTIMERA4 OUT.<br>
                             B4OUT                = 0x7 - Trigger source is CTIMERB4 OUT.<br>
                             B3OUT2               = 0x8 - Trigger source is CTIMERB3 OUT2.<br>
                             A3OUT2               = 0x9 - Trigger source is CTIMERA3 OUT2.<br>
                             A2OUT2               = 0xA - Trigger source is CTIMERA2 OUT2.<br>
                             B2OUT2               = 0xB - Trigger source is CTIMERB2 OUT2.<br>
                             A6OUT2DUAL           = 0xC - Trigger source is CTIMERA6 OUT2, dual edge.<br>
                             A5OUT2DUAL           = 0xD - Trigger source is CTIMERA5 OUT2, dual edge.<br>
                             B4OUT2DUAL           = 0xE - Trigger source is CTIMERB4 OUT2, dual edge.<br>
                             A4OUT2DUAL           = 0xF - Trigger source is CTIMERA4 OUT2, dual edge.</td>
                        </tr>

                        <tr>
                            <td>6:0</td>
                            <td>TMRA7LMT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 Pattern Limit Count.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="GLOBEN" class="panel-title">GLOBEN - Counter/Timer Global Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008100</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Alternate enables for all CTIMERs.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ENB7
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA7
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB6
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA6
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB5
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA5
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB4
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA4
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB3
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA3
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB2
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA2
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB1
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA1
                                <br>0x1</td>

                            <td align="center" colspan="1">ENB0
                                <br>0x1</td>

                            <td align="center" colspan="1">ENA0
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>ENB7</td>
                            <td>RW</td>
                            <td>Alternate enable for B7.<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>ENA7</td>
                            <td>RW</td>
                            <td>Alternate enable for A7<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>ENB6</td>
                            <td>RW</td>
                            <td>Alternate enable for B6<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>ENA6</td>
                            <td>RW</td>
                            <td>Alternate enable for A6<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>ENB5</td>
                            <td>RW</td>
                            <td>Alternate enable for B5<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>ENA5</td>
                            <td>RW</td>
                            <td>Alternate enable for A5<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>ENB4</td>
                            <td>RW</td>
                            <td>Alternate enable for B4<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>ENA4</td>
                            <td>RW</td>
                            <td>Alternate enable for A4<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>ENB3</td>
                            <td>RW</td>
                            <td>Alternate enable for B3.<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>ENA3</td>
                            <td>RW</td>
                            <td>Alternate enable for A3<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>ENB2</td>
                            <td>RW</td>
                            <td>Alternate enable for B2<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>ENA2</td>
                            <td>RW</td>
                            <td>Alternate enable for A2<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>ENB1</td>
                            <td>RW</td>
                            <td>Alternate enable for B1<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>ENA1</td>
                            <td>RW</td>
                            <td>Alternate enable for A1<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>ENB0</td>
                            <td>RW</td>
                            <td>Alternate enable for B0<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>ENA0</td>
                            <td>RW</td>
                            <td>Alternate enable for A0<br><br>
                                 LCO                  = 0x1 - Use local enable.<br>
                             DIS                  = 0x0 - Disable CTIMER.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="OUTCFG0" class="panel-title">OUTCFG0 - Counter/Timer Output Config 0</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008104</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Pad output configuration 0.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG9
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG8
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG7
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG6
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG5
                                <br>0x2</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG4
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG3
                                <br>0x1</td>

                            <td align="center" colspan="3">CFG2
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG1
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG0
                                <br>0x2</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:28</td>
                            <td>CFG9</td>
                            <td>RW</td>
                            <td>Pad output 9 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B0OUT                = 0x5 - Output is B0OUT.<br>
                             A4OUT                = 0x4 - Output is A4OUT.<br>
                             A2OUT                = 0x3 - Output is A2OUT.<br>
                             A2OUT2               = 0x2 - Output is A2OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>27:25</td>
                            <td>CFG8</td>
                            <td>RW</td>
                            <td>Pad output 8 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B6OUT                = 0x5 - Output is B6OUT.<br>
                             A4OUT2               = 0x4 - Output is A4OUT2.<br>
                             A3OUT2               = 0x3 - Output is A3OUT.<br>
                             A2OUT                = 0x2 - Output is A2OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>CFG7</td>
                            <td>RW</td>
                            <td>Pad output 7 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A7OUT                = 0x5 - Output is A7OUT.<br>
                             B5OUT                = 0x4 - Output is B5OUT.<br>
                             B1OUT                = 0x3 - Output is B1OUT.<br>
                             B1OUT2               = 0x2 - Output is B1OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>21:19</td>
                            <td>CFG6</td>
                            <td>RW</td>
                            <td>Pad output 6 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B7OUT                = 0x5 - Output is B7OUT.<br>
                             B5OUT2               = 0x4 - Output is B5OUT2.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             B1OUT                = 0x2 - Output is B1OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>18:16</td>
                            <td>CFG5</td>
                            <td>RW</td>
                            <td>Pad output 5 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A7OUT                = 0x5 - Output is A7OUT.<br>
                             B6OUT                = 0x4 - Output is A5OUT.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             A1OUT2               = 0x2 - Output is A1OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>CFG4</td>
                            <td>RW</td>
                            <td>Pad output 4 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B5OUT                = 0x5 - Output is B5OUT.<br>
                             A5OUT2               = 0x4 - Output is A5OUT2.<br>
                             A2OUT2               = 0x3 - Output is A2OUT2.<br>
                             A1OUT                = 0x2 - Output is A1OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>CFG3</td>
                            <td>RW</td>
                            <td>Pad output 3 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A6OUT                = 0x5 - Output is A6OUT.<br>
                             A1OUT                = 0x4 - Output is A1OUT.<br>
                             B0OUT                = 0x3 - Output is B0OUT.<br>
                             B0OUT2               = 0x2 - Output is B0OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>CFG2</td>
                            <td>RW</td>
                            <td>Pad output 2 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A7OUT                = 0x5 - Output is A7OUT.<br>
                             B6OUT2               = 0x4 - Output is B6OUT2.<br>
                             B1OUT2               = 0x3 - Output is B1OUT2.<br>
                             B0OUT                = 0x2 - Output is B0OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>CFG1</td>
                            <td>RW</td>
                            <td>Pad output 1 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B7OUT2               = 0x5 - Output is B7OUT2.<br>
                             A5OUT                = 0x4 - Output is A5OUT.<br>
                             A0OUT                = 0x3 - Output is A0OUT.<br>
                             A0OUT2               = 0x2 - Output is A0OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>CFG0</td>
                            <td>RW</td>
                            <td>Pad output 0 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A6OUT                = 0x5 - Output is A6OUT.<br>
                             A5OUT2               = 0x4 - Output is A5OUT2.<br>
                             B2OUT2               = 0x3 - Output is B2OUT2.<br>
                             A0OUT                = 0x2 - Output is A0OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="OUTCFG1" class="panel-title">OUTCFG1 - Counter/Timer Output Config 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008108</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Pad output configuration 1.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG19
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG18
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG17
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG16
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG15
                                <br>0x2</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG14
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG13
                                <br>0x1</td>

                            <td align="center" colspan="3">CFG12
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG11
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG10
                                <br>0x2</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:28</td>
                            <td>CFG19</td>
                            <td>RW</td>
                            <td>Pad output 19 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B1OUT2               = 0x5 - Output is B1OUT2.<br>
                             B4OUT                = 0x4 - Output is B4OUT.<br>
                             A2OUT                = 0x3 - Output is A2OUT.<br>
                             B4OUT2               = 0x2 - Output is B4OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>27:25</td>
                            <td>CFG18</td>
                            <td>RW</td>
                            <td>Pad output 18 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A3OUT2               = 0x5 - Output is A3OUT2.<br>
                             A0OUT                = 0x4 - Output is A0OUT.<br>
                             B0OUT                = 0x3 - Output is B0OUT.<br>
                             B4OUT                = 0x2 - Output is B4OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>CFG17</td>
                            <td>RW</td>
                            <td>Pad output 17 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A1OUT2               = 0x5 - Output is A1OUT2.<br>
                             A4OUT                = 0x4 - Output is A4OUT.<br>
                             B7OUT                = 0x3 - Output is B7OUT.<br>
                             A4OUT2               = 0x2 - Output is A4OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>21:19</td>
                            <td>CFG16</td>
                            <td>RW</td>
                            <td>Pad output 16 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B3OUT2               = 0x5 - Output is B3OUT2.<br>
                             A0OUT2               = 0x4 - Output is A0OUT2.<br>
                             A0OUT                = 0x3 - Output is A0OUT.<br>
                             A4OUT                = 0x2 - Output is A4OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>18:16</td>
                            <td>CFG15</td>
                            <td>RW</td>
                            <td>Pad output 15 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A4OUT2               = 0x5 - Output is A4OUT2.<br>
                             A7OUT                = 0x4 - Output is A7OUT.<br>
                             B3OUT                = 0x3 - Output is B3OUT.<br>
                             B3OUT2               = 0x2 - Output is B3OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>CFG14</td>
                            <td>RW</td>
                            <td>Pad output 14 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A7OUT                = 0x5 - Output is A7OUT.<br>
                             B7OUT2               = 0x4 - Output is B7OUT2.<br>
                             B1OUT                = 0x3 - Output is B1OUT.<br>
                             B3OUT                = 0x2 - Output is B3OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>CFG13</td>
                            <td>RW</td>
                            <td>Pad output 13 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B4OUT2               = 0x5 - Output is B4OUT2.<br>
                             A6OUT                = 0x4 - Output is A6OUT.<br>
                             A3OUT                = 0x3 - Output is A3OUT.<br>
                             A3OUT2               = 0x2 - Output is A3OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>CFG12</td>
                            <td>RW</td>
                            <td>Pad output 12 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B6OUT2               = 0x5 - Output is B6OUT2.<br>
                             B0OUT2               = 0x4 - Output is B0OUT2.<br>
                             B1OUT                = 0x3 - Output is B1OUT.<br>
                             A3OUT                = 0x2 - Output is A3OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>CFG11</td>
                            <td>RW</td>
                            <td>Pad output 11 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B5OUT2               = 0x5 - Output is B5OUT2.<br>
                             B4OUT                = 0x4 - Output is B4OUT.<br>
                             B2OUT                = 0x3 - Output is B2OUT.<br>
                             B2OUT2               = 0x2 - Output is B2OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>CFG10</td>
                            <td>RW</td>
                            <td>Pad output 10 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A6OUT                = 0x5 - Output is A6OUT.<br>
                             B4OUT2               = 0x4 - Output is B4OUT2.<br>
                             B3OUT2               = 0x3 - Output is B3OUT2.<br>
                             B2OUT                = 0x2 - Output is B2OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="OUTCFG2" class="panel-title">OUTCFG2 - Counter/Timer Output Config 2</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000810C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Pad output configuration 2.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG29
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG28
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG27
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG26
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG25
                                <br>0x2</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG24
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG23
                                <br>0x1</td>

                            <td align="center" colspan="3">CFG22
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG21
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG20
                                <br>0x2</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:28</td>
                            <td>CFG29</td>
                            <td>RW</td>
                            <td>Pad output 29 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A3OUT2               = 0x5 - Output is A3OUT2.<br>
                             A7OUT                = 0x4 - Output is A7OUT.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             B5OUT2               = 0x2 - Output is B5OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>27:25</td>
                            <td>CFG28</td>
                            <td>RW</td>
                            <td>Pad output 28 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B0OUT2               = 0x5 - Output is B0OUT2.<br>
                             A5OUT2               = 0x4 - Output is A5OUT2.<br>
                             A3OUT                = 0x3 - Output is A3OUT.<br>
                             A7OUT                = 0x2 - Output is A7OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>24:22</td>
                            <td>CFG27</td>
                            <td>RW</td>
                            <td>Pad output 27 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B2OUT2               = 0x5 - Output is B2OUT2.<br>
                             B6OUT                = 0x4 - Output is B6OUT.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             B6OUT2               = 0x2 - Output is B6OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>21:19</td>
                            <td>CFG26</td>
                            <td>RW</td>
                            <td>Pad output 26 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A1OUT2               = 0x5 - Output is A1OUT2.<br>
                             A5OUT                = 0x4 - Output is A5OUT.<br>
                             B2OUT                = 0x3 - Output is B2OUT.<br>
                             B6OUT                = 0x2 - Output is B6OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>18:16</td>
                            <td>CFG25</td>
                            <td>RW</td>
                            <td>Pad output 25 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A2OUT2               = 0x5 - Output is A2OUT2.<br>
                             A6OUT                = 0x4 - Output is A6OUT.<br>
                             B2OUT                = 0x3 - Output is B2OUT.<br>
                             B4OUT2               = 0x2 - Output is B4OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>CFG24</td>
                            <td>RW</td>
                            <td>Pad output 24 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B1OUT2               = 0x5 - Output is B1OUT2.<br>
                             A1OUT                = 0x4 - Output is A1OUT.<br>
                             A2OUT                = 0x3 - Output is A2OUT.<br>
                             A6OUT                = 0x2 - Output is A6OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>CFG23</td>
                            <td>RW</td>
                            <td>Pad output 23 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B0OUT2               = 0x5 - Output is B0OUT2.<br>
                             A5OUT                = 0x4 - Output is A5OUT.<br>
                             A7OUT                = 0x3 - Output is A7OUT.<br>
                             B5OUT2               = 0x2 - Output is B5OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>8:6</td>
                            <td>CFG22</td>
                            <td>RW</td>
                            <td>Pad output 22 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A2OUT2               = 0x5 - Output is A2OUT2.<br>
                             A1OUT                = 0x4 - Output is A1OUT.<br>
                             A6OUT                = 0x3 - Output is A6OUT.<br>
                             B5OUT                = 0x2 - Output is B5OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>CFG21</td>
                            <td>RW</td>
                            <td>Pad output 21 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A0OUT2               = 0x5 - Output is A0OUT2.<br>
                             B5OUT                = 0x4 - Output is B5OUT.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             A5OUT2               = 0x2 - Output is A5OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>CFG20</td>
                            <td>RW</td>
                            <td>Pad output 20 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B2OUT2               = 0x5 - Output is B2OUT2.<br>
                             A1OUT2               = 0x4 - Output is A1OUT2.<br>
                             A1OUT                = 0x3 - Output is A1OUT.<br>
                             A5OUT                = 0x2 - Output is A5OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="OUTCFG3" class="panel-title">OUTCFG3 - Counter/Timer Output Config 3</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008114</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Pad output configuration 3.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="26">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CFG31
                                <br>0x2</td>

                            <td align="center" colspan="3">CFG30
                                <br>0x2</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:6</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>CFG31</td>
                            <td>RW</td>
                            <td>Pad output 31 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             B3OUT2               = 0x5 - Output is B3OUT2.<br>
                             B7OUT                = 0x4 - Output is B7OUT.<br>
                             A6OUT                = 0x3 - Output is A6OUT.<br>
                             B7OUT2               = 0x2 - Output is B7OUT2<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>CFG30</td>
                            <td>RW</td>
                            <td>Pad output 30 configuration<br><br>
                                 A7OUT2               = 0x7 - Output is A7OUT2.<br>
                             A6OUT2               = 0x6 - Output is A6OUT2.<br>
                             A0OUT2               = 0x5 - Output is A0OUT2.<br>
                             A4OUT2               = 0x4 - Output is A4OUT2.<br>
                             B3OUT                = 0x3 - Output is B3OUT.<br>
                             B7OUT                = 0x2 - Output is B7OUT<br>
                             ONE                  = 0x1 - Force output to 1.<br>
                             ZERO                 = 0x0 - Force output to 0</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INCFG" class="panel-title">INCFG - Counter/Timer Input Config</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008118</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Pad input configuration.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB7
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA7
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB6
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA6
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB5
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA5
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB4
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA4
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB3
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA3
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB2
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA2
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB1
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA1
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGB0
                                <br>0x0</td>

                            <td align="center" colspan="1">CFGA0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CFGB7</td>
                            <td>RW</td>
                            <td>CTIMER B7 input configuration<br><br>
                                 CT31                 = 0x1 - Input is CT31<br>
                             CT30                 = 0x0 - Input is CT30</td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>CFGA7</td>
                            <td>RW</td>
                            <td>CTIMER A7 input configuration<br><br>
                                 CT29                 = 0x1 - Input is CT29<br>
                             CT28                 = 0x0 - Input is CT28</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>CFGB6</td>
                            <td>RW</td>
                            <td>CTIMER B6 input configuration<br><br>
                                 CT27                 = 0x1 - Input is CT27<br>
                             CT26                 = 0x0 - Input is CT26</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CFGA6</td>
                            <td>RW</td>
                            <td>CTIMER A6 input configuration<br><br>
                                 CT25                 = 0x1 - Input is CT25<br>
                             CT24                 = 0x0 - Input is CT24</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CFGB5</td>
                            <td>RW</td>
                            <td>CTIMER B5 input configuration<br><br>
                                 CT23                 = 0x1 - Input is CT23<br>
                             CT22                 = 0x0 - Input is CT22</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CFGA5</td>
                            <td>RW</td>
                            <td>CTIMER A5 input configuration<br><br>
                                 CT21                 = 0x1 - Input is CT21<br>
                             CT20                 = 0x0 - Input is CT20</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CFGB4</td>
                            <td>RW</td>
                            <td>CTIMER B4 input configuration<br><br>
                                 CT19                 = 0x1 - Input is CT19<br>
                             CT18                 = 0x0 - Input is CT18</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>CFGA4</td>
                            <td>RW</td>
                            <td>CTIMER A4 input configuration<br><br>
                                 CT17                 = 0x1 - Input is CT17<br>
                             CT16                 = 0x0 - Input is CT16</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>CFGB3</td>
                            <td>RW</td>
                            <td>CTIMER B3 input configuration<br><br>
                                 CT15                 = 0x1 - Input is CT15<br>
                             CT14                 = 0x0 - Input is CT14</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>CFGA3</td>
                            <td>RW</td>
                            <td>CTIMER A3 input configuration<br><br>
                                 CT13                 = 0x1 - Input is CT13<br>
                             CT12                 = 0x0 - Input is CT12</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>CFGB2</td>
                            <td>RW</td>
                            <td>CTIMER B2 input configuration<br><br>
                                 CT11                 = 0x1 - Input is CT11<br>
                             CT10                 = 0x0 - Input is CT10</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CFGA2</td>
                            <td>RW</td>
                            <td>CTIMER A2 input configuration<br><br>
                                 CT9                  = 0x1 - Input is CT9<br>
                             CT8                  = 0x0 - Input is CT8</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CFGB1</td>
                            <td>RW</td>
                            <td>CTIMER B1 input configuration<br><br>
                                 CT7                  = 0x1 - Input is CT7<br>
                             CT6                  = 0x0 - Input is CT6</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CFGA1</td>
                            <td>RW</td>
                            <td>CTIMER A1 input configuration<br><br>
                                 CT5                  = 0x1 - Input is CT5<br>
                             CT4                  = 0x0 - Input is CT4</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CFGB0</td>
                            <td>RW</td>
                            <td>CTIMER B0 input configuration<br><br>
                                 CT3                  = 0x1 - Input is CT3<br>
                             CT2                  = 0x0 - Input is CT2</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CFGA0</td>
                            <td>RW</td>
                            <td>CTIMER A0 input configuration<br><br>
                                 CT1                  = 0x1 - Input is CT1<br>
                             CT0                  = 0x0 - Input is CT0</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STCFG" class="panel-title">STCFG - Configuration Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008140</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER Configuration Register contains the software control for selecting the clock divider and source feeding the system timer.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">FREEZE
                                <br>0x1</td>

                            <td align="center" colspan="1">CLEAR
                                <br>0x0</td>

                            <td align="center" colspan="14">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_H_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_G_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_F_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_E_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_D_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_C_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_B_EN
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARE_A_EN
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="4">CLKSEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>FREEZE</td>
                            <td>RW</td>
                            <td>Set this bit to one to freeze the clock input to the COUNTER register. Once frozen, the value can be safely written from the MCU.  Unfreeze to resume.<br><br>
                                 THAW                 = 0x0 - Let the COUNTER register run on its input clock.<br>
                             FREEZE               = 0x1 - Stop the COUNTER register for loading.</td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>CLEAR</td>
                            <td>RW</td>
                            <td>Set this bit to one to clear the System Timer register.  If this bit is set to '1', the system timer register will stay cleared.  It needs to be set to '0' for the system timer to start running.<br><br>
                                 RUN                  = 0x0 - Let the COUNTER register run on its input clock.<br>
                             CLEAR                = 0x1 - Stop the COUNTER register for loading.</td>
                        </tr>

                        <tr>
                            <td>29:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>COMPARE_H_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare H disabled.<br>
                             ENABLE               = 0x1 - Compare H enabled.</td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>COMPARE_G_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare G disabled.<br>
                             ENABLE               = 0x1 - Compare G enabled.</td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>COMPARE_F_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare F disabled.<br>
                             ENABLE               = 0x1 - Compare F enabled.</td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>COMPARE_E_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare E disabled.<br>
                             ENABLE               = 0x1 - Compare E enabled.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>COMPARE_D_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare D disabled.<br>
                             ENABLE               = 0x1 - Compare D enabled.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>COMPARE_C_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare C disabled.<br>
                             ENABLE               = 0x1 - Compare C enabled.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>COMPARE_B_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare B disabled.<br>
                             ENABLE               = 0x1 - Compare B enabled.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>COMPARE_A_EN</td>
                            <td>RW</td>
                            <td>Selects whether compare is enabled for the corresponding SCMPR register. If compare is enabled, the interrupt status is set once the comparision is met.<br><br>
                                 DISABLE              = 0x0 - Compare A disabled.<br>
                             ENABLE               = 0x1 - Compare A enabled.</td>
                        </tr>

                        <tr>
                            <td>7:4</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:0</td>
                            <td>CLKSEL</td>
                            <td>RW</td>
                            <td>Selects an appropriate clock source and divider to use for the System Timer clock.<br><br>
                                 NOCLK                = 0x0 - No clock enabled.<br>
                             HFRC_DIV16           = 0x1 - 3MHz from the HFRC clock divider.<br>
                             HFRC_DIV256          = 0x2 - 187.5KHz from the HFRC clock divider.<br>
                             XTAL_DIV1            = 0x3 - 32768Hz from the crystal oscillator.<br>
                             XTAL_DIV2            = 0x4 - 16384Hz from the crystal oscillator.<br>
                             XTAL_DIV32           = 0x5 - 1024Hz from the crystal oscillator.<br>
                             LFRC_DIV1            = 0x6 - Approximately 1KHz from the LFRC oscillator (uncalibrated).<br>
                             CTIMER0A             = 0x7 - Use CTIMER 0 section A as a prescaler for the clock source.<br>
                             CTIMER0B             = 0x8 - Use CTIMER 0 section B (or A and B linked together) as a prescaler for the clock source.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STTMR" class="panel-title">STTMR - System Timer Count Register (Real Time Counter)</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008144</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The COUNTER Register contains the running count of time as maintained by incrementing for every rising clock edge of the clock source selected in the configuration register. It is this counter value that captured in the capture registers and it is this counter value that is compared against the various compare registers.   This register cannot be written, but can be cleared to 0 for a deterministic value.   Use the FREEZE bit will stop this counter from incrementing.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">STTMR
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>STTMR</td>
                            <td>RO</td>
                            <td>Value of the 32-bit counter as it ticks over.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CAPTURECONTROL" class="panel-title">CAPTURECONTROL - Capture Control Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008148</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER Capture Control Register controls each of the 4 capture registers. It selects their GPIO pin number for a trigger source, enables a capture operation and sets the input polarity for the capture. NOTE: 8-bit writes can control individual capture registers atomically.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="28">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURE3
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURE2
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURE1
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURE0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:4</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CAPTURE3</td>
                            <td>RW</td>
                            <td>Selects whether capture is enabled for the specified capture register.<br><br>
                                 DISABLE              = 0x0 - Capture function disabled.<br>
                             ENABLE               = 0x1 - Capture function enabled.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CAPTURE2</td>
                            <td>RW</td>
                            <td>Selects whether capture is enabled for the specified capture register.<br><br>
                                 DISABLE              = 0x0 - Capture function disabled.<br>
                             ENABLE               = 0x1 - Capture function enabled.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CAPTURE1</td>
                            <td>RW</td>
                            <td>Selects whether capture is enabled for the specified capture register.<br><br>
                                 DISABLE              = 0x0 - Capture function disabled.<br>
                             ENABLE               = 0x1 - Capture function enabled.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CAPTURE0</td>
                            <td>RW</td>
                            <td>Selects whether capture is enabled for the specified capture register.<br><br>
                                 DISABLE              = 0x0 - Capture function disabled.<br>
                             ENABLE               = 0x1 - Capture function enabled.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR0" class="panel-title">SCMPR0 - Compare Register A</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008150</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR0</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_A_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR1" class="panel-title">SCMPR1 - Compare Register B</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008154</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR1</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_B_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR2" class="panel-title">SCMPR2 - Compare Register C</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008158</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR2</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_C_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR3" class="panel-title">SCMPR3 - Compare Register D</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000815C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR3</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_D_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR4" class="panel-title">SCMPR4 - Compare Register E</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008160</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR4
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR4</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_E_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR5" class="panel-title">SCMPR5 - Compare Register F</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008164</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR5
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR5</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_F_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR6" class="panel-title">SCMPR6 - Compare Register G</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008168</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise. Reading this register shows the COUNTER value at which this interrupt will occur.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR6
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR6</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_G_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCMPR7" class="panel-title">SCMPR7 - Compare Register H</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000816C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The VALUE in this bit field is used to compare against the VALUE in the COUNTER register. If the match criterion in the configuration register is met then a corresponding interrupt status bit is set.  The match criterion is defined as COUNTER equal to COMPARE. To establish a desired value in this COMPARE register, write the number of ticks in the future to this register to indicate when to interrupt. The hardware does the addition to the COUNTER value in the STIMER clock domain so that the math is precise.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCMPR7
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCMPR7</td>
                            <td>RW</td>
                            <td>Compare this value to the value in the COUNTER register according to the match criterion, as selected in the COMPARE_H_EN bit in the REG_CTIMER_STCGF register.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCAPT0" class="panel-title">SCAPT0 - Capture Register A</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081E0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER capture Register A grabs the VALUE in the COUNTER register whenever capture condition (event) A is asserted. This register holds a time stamp for the event.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCAPT0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCAPT0</td>
                            <td>RO</td>
                            <td>Whenever the event is detected, the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCAPT1" class="panel-title">SCAPT1 - Capture Register B</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081E4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER capture Register B grabs the VALUE in the COUNTER register whenever capture condition (event) B is asserted. This register holds a time stamp for the event.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCAPT1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCAPT1</td>
                            <td>RO</td>
                            <td>Whenever the event is detected, the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCAPT2" class="panel-title">SCAPT2 - Capture Register C</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081E8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER capture Register C grabs the VALUE in the COUNTER register whenever capture condition (event) C is asserted. This register holds a time stamp for the event.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCAPT2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCAPT2</td>
                            <td>RO</td>
                            <td>Whenever the event is detected, the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCAPT3" class="panel-title">SCAPT3 - Capture Register D</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081EC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The STIMER capture Register D grabs the VALUE in the COUNTER register whenever capture condition (event) D is asserted. This register holds a time stamp for the event.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCAPT3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCAPT3</td>
                            <td>RO</td>
                            <td>Whenever the event is detected, the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SNVR0" class="panel-title">SNVR0 - System Timer NVRAM_A Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081F0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The NVRAM_A Register contains a portion of the stored epoch offset associated with the time in the COUNTER register. This register is only reset by POI not by HRESETn. Its contents are intended to survive all reset level except POI and full power cycles.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SNVR0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SNVR0</td>
                            <td>RW</td>
                            <td>Value of the 32-bit counter as it ticks over.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SNVR1" class="panel-title">SNVR1 - System Timer NVRAM_B Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081F4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The NVRAM_B Register contains a portion of the stored epoch offset associated with the time in the COUNTER register. This register is only reset by POI not by HRESETn. Its contents are intended to survive all reset level except POI and full power cycles.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SNVR1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SNVR1</td>
                            <td>RW</td>
                            <td>Value of the 32-bit counter as it ticks over.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SNVR2" class="panel-title">SNVR2 - System Timer NVRAM_C Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081F8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The NVRAM_C Register contains a portion of the stored epoch offset associated with the time in the COUNTER register. This register is only reset by POI not by HRESETn. Its contents are intended to survive all reset level except POI and full power cycles.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SNVR2
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SNVR2</td>
                            <td>RW</td>
                            <td>Value of the 32-bit counter as it ticks over.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SNVR3" class="panel-title">SNVR3 - System Timer NVRAM_D Register</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400081FC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>The NVRAM_D Register contains a portion of the stored epoch offset associated with the time in the COUNTER register. This register is only reset by POI not by HRESETn. Its contents are intended to survive all reset level except POI and full power cycles.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SNVR3
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SNVR3</td>
                            <td>RW</td>
                            <td>Value of the 32-bit counter as it ticks over.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTEN" class="panel-title">INTEN - Counter/Timer Interrupts: Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008200</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTMRB7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C0INT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTMRB7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>CTMRA7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>CTMRB6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>CTMRA6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>CTMRB5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>CTMRA5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>CTMRB4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>CTMRA4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>CTMRB3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>CTMRA3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>CTMRB2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>CTMRA2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>CTMRB1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>CTMRA1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>CTMRB0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>CTMRA0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CTMRB7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>CTMRA7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>CTMRB6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CTMRA6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CTMRB5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CTMRA5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CTMRB4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>CTMRA4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>CTMRB3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>CTMRA3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>CTMRB2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CTMRA2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CTMRB1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CTMRA1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTMRB0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CTMRA0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTSTAT" class="panel-title">INTSTAT - Counter/Timer Interrupts: Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008204</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Read bits from this register to discover the cause of a recent interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTMRB7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C0INT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTMRB7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>CTMRA7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>CTMRB6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>CTMRA6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>CTMRB5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>CTMRA5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>CTMRB4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>CTMRA4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>CTMRB3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>CTMRA3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>CTMRB2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>CTMRA2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>CTMRB1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>CTMRA1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>CTMRB0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>CTMRA0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CTMRB7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>CTMRA7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>CTMRB6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CTMRA6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CTMRB5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CTMRA5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CTMRB4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>CTMRA4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>CTMRB3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>CTMRA3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>CTMRB2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CTMRA2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CTMRB1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CTMRA1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTMRB0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CTMRA0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTCLR" class="panel-title">INTCLR - Counter/Timer Interrupts: Clear</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008208</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTMRB7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C0INT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTMRB7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>CTMRA7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>CTMRB6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>CTMRA6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>CTMRB5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>CTMRA5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>CTMRB4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>CTMRA4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>CTMRB3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>CTMRA3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>CTMRB2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>CTMRA2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>CTMRB1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>CTMRA1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>CTMRB0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>CTMRA0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CTMRB7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>CTMRA7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>CTMRB6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CTMRA6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CTMRB5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CTMRA5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CTMRB4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>CTMRA4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>CTMRB3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>CTMRA3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>CTMRB2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CTMRA2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CTMRB1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CTMRA1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTMRB0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CTMRA0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="INTSET" class="panel-title">INTSET - Counter/Timer Interrupts: Set</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000820C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">CTMRB7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C1INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA7C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA6C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA5C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA4C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA3C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA2C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA1C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRB0C0INT
                                <br>0x0</td>

                            <td align="center" colspan="1">CTMRA0C0INT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>CTMRB7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>CTMRA7C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>CTMRB6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>CTMRA6C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>CTMRB5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>CTMRA5C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>CTMRB4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>CTMRA4C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>CTMRB3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>CTMRA3C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>CTMRB2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>CTMRA2C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>CTMRB1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>CTMRA1C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>CTMRB0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>CTMRA0C1INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CTMRB7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>CTMRA7C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A7 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>CTMRB6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CTMRA6C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A6 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CTMRB5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CTMRA5C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A5 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CTMRB4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>CTMRA4C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A4 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>CTMRB3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>CTMRA3C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A3 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>CTMRB2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CTMRA2C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A2 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CTMRB1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CTMRA1C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A1 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTMRB0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer B0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CTMRA0C0INT</td>
                            <td>RW</td>
                            <td>Counter/Timer A0 interrupt based on COMPR0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STMINTEN" class="panel-title">STMINTEN - STIMER Interrupt registers: Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008300</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Set bits in this register to allow this module to generate the corresponding interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="19">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURED
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREC
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREB
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREA
                                <br>0x0</td>

                            <td align="center" colspan="1">OVERFLOW
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREH
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREG
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREF
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREE
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARED
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREC
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREB
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREA
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CAPTURED</td>
                            <td>RW</td>
                            <td>CAPTURE register D has grabbed the value in the counter<br><br>
                                 CAPD_INT             = 0x1 - Capture D interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CAPTUREC</td>
                            <td>RW</td>
                            <td>CAPTURE register C has grabbed the value in the counter<br><br>
                                 CAPC_INT             = 0x1 - CAPTURE C interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CAPTUREB</td>
                            <td>RW</td>
                            <td>CAPTURE register B has grabbed the value in the counter<br><br>
                                 CAPB_INT             = 0x1 - CAPTURE B interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CAPTUREA</td>
                            <td>RW</td>
                            <td>CAPTURE register A has grabbed the value in the counter<br><br>
                                 CAPA_INT             = 0x1 - CAPTURE A interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>OVERFLOW</td>
                            <td>RW</td>
                            <td>COUNTER over flowed from 0xFFFFFFFF back to 0x00000000.<br><br>
                                 OFLOW_INT            = 0x1 - Overflow interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>COMPAREH</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register H.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>COMPAREG</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register G.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>COMPAREF</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register F.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>COMPAREE</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register E.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>COMPARED</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register D.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>COMPAREC</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register C.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>COMPAREB</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register B.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>COMPAREA</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register A.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STMINTSTAT" class="panel-title">STMINTSTAT - STIMER Interrupt registers: Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008304</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Read bits from this register to discover the cause of a recent interrupt.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="19">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURED
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREC
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREB
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREA
                                <br>0x0</td>

                            <td align="center" colspan="1">OVERFLOW
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREH
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREG
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREF
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREE
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARED
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREC
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREB
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREA
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CAPTURED</td>
                            <td>RW</td>
                            <td>CAPTURE register D has grabbed the value in the counter<br><br>
                                 CAPD_INT             = 0x1 - Capture D interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CAPTUREC</td>
                            <td>RW</td>
                            <td>CAPTURE register C has grabbed the value in the counter<br><br>
                                 CAPC_INT             = 0x1 - CAPTURE C interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CAPTUREB</td>
                            <td>RW</td>
                            <td>CAPTURE register B has grabbed the value in the counter<br><br>
                                 CAPB_INT             = 0x1 - CAPTURE B interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CAPTUREA</td>
                            <td>RW</td>
                            <td>CAPTURE register A has grabbed the value in the counter<br><br>
                                 CAPA_INT             = 0x1 - CAPTURE A interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>OVERFLOW</td>
                            <td>RW</td>
                            <td>COUNTER over flowed from 0xFFFFFFFF back to 0x00000000.<br><br>
                                 OFLOW_INT            = 0x1 - Overflow interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>COMPAREH</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register H.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>COMPAREG</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register G.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>COMPAREF</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register F.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>COMPAREE</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register E.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>COMPARED</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register D.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>COMPAREC</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register C.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>COMPAREB</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register B.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>COMPAREA</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register A.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STMINTCLR" class="panel-title">STMINTCLR - STIMER Interrupt registers: Clear</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40008308</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to clear the interrupt status associated with that bit.</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="19">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURED
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREC
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREB
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREA
                                <br>0x0</td>

                            <td align="center" colspan="1">OVERFLOW
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREH
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREG
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREF
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREE
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARED
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREC
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREB
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREA
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CAPTURED</td>
                            <td>RW</td>
                            <td>CAPTURE register D has grabbed the value in the counter<br><br>
                                 CAPD_INT             = 0x1 - Capture D interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CAPTUREC</td>
                            <td>RW</td>
                            <td>CAPTURE register C has grabbed the value in the counter<br><br>
                                 CAPC_INT             = 0x1 - CAPTURE C interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CAPTUREB</td>
                            <td>RW</td>
                            <td>CAPTURE register B has grabbed the value in the counter<br><br>
                                 CAPB_INT             = 0x1 - CAPTURE B interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CAPTUREA</td>
                            <td>RW</td>
                            <td>CAPTURE register A has grabbed the value in the counter<br><br>
                                 CAPA_INT             = 0x1 - CAPTURE A interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>OVERFLOW</td>
                            <td>RW</td>
                            <td>COUNTER over flowed from 0xFFFFFFFF back to 0x00000000.<br><br>
                                 OFLOW_INT            = 0x1 - Overflow interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>COMPAREH</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register H.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>COMPAREG</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register G.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>COMPAREF</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register F.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>COMPAREE</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register E.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>COMPARED</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register D.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>COMPAREC</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register C.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>COMPAREB</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register B.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>COMPAREA</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register A.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="STMINTSET" class="panel-title">STMINTSET - STIMER Interrupt registers: Set</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4000830C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="19">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTURED
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREC
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREB
                                <br>0x0</td>

                            <td align="center" colspan="1">CAPTUREA
                                <br>0x0</td>

                            <td align="center" colspan="1">OVERFLOW
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREH
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREG
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREF
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREE
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPARED
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREC
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREB
                                <br>0x0</td>

                            <td align="center" colspan="1">COMPAREA
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>CAPTURED</td>
                            <td>RW</td>
                            <td>CAPTURE register D has grabbed the value in the counter<br><br>
                                 CAPD_INT             = 0x1 - Capture D interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>CAPTUREC</td>
                            <td>RW</td>
                            <td>CAPTURE register C has grabbed the value in the counter<br><br>
                                 CAPC_INT             = 0x1 - CAPTURE C interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>CAPTUREB</td>
                            <td>RW</td>
                            <td>CAPTURE register B has grabbed the value in the counter<br><br>
                                 CAPB_INT             = 0x1 - CAPTURE B interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>CAPTUREA</td>
                            <td>RW</td>
                            <td>CAPTURE register A has grabbed the value in the counter<br><br>
                                 CAPA_INT             = 0x1 - CAPTURE A interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>OVERFLOW</td>
                            <td>RW</td>
                            <td>COUNTER over flowed from 0xFFFFFFFF back to 0x00000000.<br><br>
                                 OFLOW_INT            = 0x1 - Overflow interrupt status bit was set.</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>COMPAREH</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register H.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>COMPAREG</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register G.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>COMPAREF</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register F.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>COMPAREE</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register E.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>COMPARED</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register D.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>COMPAREC</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register C.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>COMPAREB</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register B.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>COMPAREA</td>
                            <td>RW</td>
                            <td>COUNTER is greater than or equal to COMPARE register A.<br><br>
                                 COMPARED             = 0x1 - COUNTER greater than or equal to COMPARE register.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

    </body>

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